With the growth of the wireless communications industry, wireless communications protocols become more sophisticated, often resulting in narrow channel bandwidths. As such, RF receivers must be capable of receiving RF signals on narrow channels with low noise and a high degree of selectivity. Wireless communications systems are often battery powered and must function with minimal power consumption.
A traditional RF receiver architecture is the heterodyne architecture in which a received RF signal is mixed with a local oscillator signal to obtain a lower intermediate frequency (IF) signal. The IF signal is then filtered to the desired channel bandwidth to remove interfering signals and signals from adjacent channels. As channel bandwidths become narrower, the inclination is to reduce the frequency of the IF signal. An extreme example is a direct-conversion receiver, which has a direct current (DC) IF signal; however, problems with 1/f noise, DC offsets, and second-order inter-modulation (IIP2) effects may eliminate the direct-conversion receiver from many applications. As a result, receivers using a very low intermediate frequency (VLIF) for their IF sections are becoming increasingly common.
One design challenge in a VLIF receiver is rejection of image frequencies. In any heterodyne receiver, when a received RF input signal FR, mixes with a local oscillator signal FLO, the mixer produces an output signal with sums and differences of FR and FLO. If FLO is chosen with a lower frequency than a desired RF input signal FDRF, then the FR−FLO portion of the mixer output signal produces a desired VLIF signal FDVLIF; however, the mixer output signal will also include the FR+FLO portion of the mixer output signal from the desired RF input signal FDRF, which produces a frequency equal to (2*FDRF−FDVLIF). Any received RF signals in this frequency range would be easily filtered out by IF bandpass circuitry. A blocking image frequency is located at the frequency of FLO−FDVLIF; therefore, a received blocking image signal at the blocking image frequency would produce a mixer output signal with the FR−FLO portion of the mixer output signal identical in frequency to the frequency of FDVLIF, but with the quadrature phase-shifted 180 degrees. Complex filtering can then be used to remove the blocking image signal. The FLO+FR portion of the mixer output signal produces a frequency equal to (2*FDRF+FDVLIF), which is easily filtered out by IF bandpass circuitry. In some applications, the blocking image signal may be at least 41 decibels (db) higher than the desired RF input signal FDRF.
For example, if the frequency of FLO=10 Mhz and the frequency of FDRF=10.1 Mhz, then the frequency of FDVLIF=100 Khz and the blocking image frequency would equal 9.9 Mhz. Any received signals at 9.9 Mhz would be mixed to the same frequency as FDVLIF, namely 100 Khz. Since 9.9 Mhz is relatively close to 10.1 Mhz, the second image frequency cannot be easily filtered out in the RF section; therefore, the VLIF section must somehow eliminate the second image frequency.
A quadrature VLIF receiver 10 can virtually eliminate the blocking image signal, as shown in FIG. 1. A receiver input signal RFIN feeds a first passive RF bandpass filter 12, which then feeds a low noise RF amplifier (LNA) 14. The LNA 14 then feeds a second passive RF bandpass filter 16, which feeds a quadrature VLIF mixer 18. The quadrature VLIF receiver 10 may be integrated into an integrated circuit (IC). The first passive RF bandpass filter 12 may be external to the IC, and may include a surface acoustic wave (SAW) filter. The second passive RF bandpass filter 16 may be included in the IC, and may include an inductor and capacitor tank circuit. The quadrature VLIF mixer 18 receives an in-phase local oscillator signal IRF and a quadrature-phase local oscillator signal QRF from a quadrature frequency synthesizer 20. IRF is identical in frequency and amplitude to QRF; however, IRF is phase-shifted from QRF by essentially 90 degrees. The quadrature VLIF mixer 18 creates an in-phase VLIF signal IVLIF and a quadrature-phase VLIF signal QVLIF that feed quadrature VLIF bandpass and analog-to-digital (A/D) conversion circuitry 22, which filters and converts the analog VLIF quadrature signals into in-phase digital VLIF data IDIGITAL and quadrature-phase digital VLIF data QDIGITAL. The quadrature VLIF bandpass and A/D conversion circuitry 22 may include complex polyphase bandpass circuitry.
By using a quadrature architecture when receiving the desired RF input signal FDRF, the FR−FLO portion of the mixer output signal produces the desired VLIF signal FDVLIF, or FDRF=FLO+FDVLIF; however, the image blocking signal at FLO−FDVLIF will also be down converted but to a negative VLIF frequency. The difference between the negative VLIF frequency of the image blocking signal and the positive VLIF frequency of the desired VLIF signal FDVLIF is in the phase relationships of the quadrature VLIF signals IVLIF, QVLIF. One of the received signals will produce quadrature VLIF signals IVLIF, QVLIF in which IVLIF leads QVLIF by essentially 90 degrees. The other of the received signals will produce quadrature VLIF signals IVLIF, QVLIF in which IVLIF lags QVLIF by essentially 90 degrees. This lead/lag difference in quadrature allows complex polyphase filters to filter out one received signal and amplify the other received signal, thereby rejecting the image blocking signal and amplifying the desired RF input signal FDRF. Any mismatch between the processing of in-phase signals and quadrature-phase signals will result in degradation of the rejection of second image signals; therefore, a need exists for a quadrature VLIF receiver with close matching between the circuitry processing the in-phase signals and the quadrature-phase signals. Such a receiver needs to be low-powered and low noise.